本试验基于AXI Memory Mapped to PCI Express IP进行设计参考三、实战篇-NVME SSD控制之FPGA实现一-CSDN博客三、实战篇-NVME SSD控制之FPGA实现二-CSDN博客一、队列单个写方式单次最大读写1MB流程计时开始--》写单条提交队列到RAM-写门铃-等待写完成-写单条提交队列到RAM-写门铃-等待写完成……循环-》接收到最后一条写完成-》计时结束1GB写116670610 * 8ns933,364,880ns0.933364880s写速率1024MB/0.933364880s1097 MB/s读116366857 * 8ns930934856ns0.930934856s读速率1024MB/0.930934856s 1,099 MB/s5GB写565271066 * 8ns4522168528ns4.522168528s写速率5*1024MB/4.522168528s1132.2 MB/s读563793139 * 8ns4510345112ns4.510345112s读速率5*1024MB/4.510345112s 1135.16MB/s10GB写1117942143 * 8ns8943537144ns8.943537144s写速率10*1024MB/8.943537144s1144.96 MB/s读1122370153 * 8ns8978961224ns8.978961224s读速率10*1024MB/8.978961224s 1140.44MB/s二、队列全写满方式流程计时开始--》写RAM将提交队列写满-写门铃-等待队列有空位-写RAM再次将提交队列写满-写门铃-等待队列有空位……循环—》接受到的完成队列和提交队列相同—》计时结束①队列深度81GB写112984600 * 8ns903876800ns0.903876800s写速率1024MB/0.903876800s1132.8MB/s读100339180 * 8ns802713440ns0.802713440s读速率1024MB/0.802713440s1275.67MB/s5GB写556723646 * 8ns4453789168ns4.453789168s写速率5*1024MB/4.453789168s1149.5MB/s读483943216 * 8ns3871545728ns3.871545728s读速率5*1024MB/3.871545728s 1322.46MB/s10GB写1109250670 * 8ns8874005360ns8.874005360s写速率10*1024MB/8.874005360s1153.9MB/s读963944010 * 8ns7711552080ns7.711552080s读速率10*1024MB/7.711552080s1327.8MB/s统计